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Departmental Colloquium: Ansgar Endress (City University of London)

The CEU Campus
Wednesday, July 3, 2019, 5:00 pm – 6:30 pm

Interference and memory capacity limitations

Working Memory (WM) retains items over brief periods of time for use by ongoing cognitive operations. WM capacity is thought to be limited to 3 or 4 items. Further, such capacity limitations are often thought to reflect limitations of active maintenance mechanisms such as attention and executive function.

Here, I suggest that such severe capacity-limitations mostly arise in experiments with substantial proactive interference (PI) among items, and that these limitations disappear when interference among items is reduced. Further, I provide a simple mathematical proof showing that, under general conditions, interference among memory items guarantees fixed and limited capacity limitations even in the absence of the maintenance mechanisms that are supposedly at the root of WM capacity limitations. Interference can also mimic the predictions of different theories of WM, notably those of slot-like and continuous resource-like theories. As a result, neither the existence of WM limitations nor their shape are necessarily diagnostic of the memory mechanisms causing these limitations. Instead, at least in some situations, WM limitations might be largely automatic consequences of interference.

In line with this view, I show that the effects of interference on memory performance are relatively independent of presentation speed and executive secondary tasks, and that the forms of attention that supposedly yield capacity limitations of 3 or 4 items – simultaneous attention as measured by multiple object tracking – have fundamentally different properties from WM.

Based on these and other experiments, I propose that, in many situations, the primary limitation of memory might be to retrieve relevant rather than irrelevant memory representations, and that this problem might be exacerbated if “crowding” of the memory space makes it hard to identify the appropriate memory items.